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Title page for ETD etd-07082014-082801

Type of Document Dissertation
Author Bennett, William Geoffrey
URN etd-07082014-082801
Title Single Event Upset Mechanisms in Emerging Memory Technologies
Degree PhD
Department Electrical Engineering
Advisory Committee
Advisor Name Title
Dr. Ronald Schrimpf Committee Chair
Dr. Arthur Witulski Committee Member
Dr. Norman Tolk Committee Member
Dr. Robert Reed Committee Member
Dr. Robert Weller Committee Member
  • single event upsets
  • multiple event upsets
  • RRAM
  • resistive random access memory
  • charge sharing
  • charge competition
  • multiple node charge collection
  • two photon absorption
  • heavy ion irradiation
Date of Defense 2014-06-23
Availability unrestricted
The commercial memory industry, now more than ever, is looking at CMOS Flash alternatives to provide continued scaling of data storage elements. Meanwhile, radiation tolerant memory researchers and designers are investigating these new technologies to see if they could provide higher reliability in radiation environments compared to their CMOS counterparts. New reliability concerns can arise with continued scaling and the introduction of new materials. Presented are various single event effects (SEE) for a Hf/HfO2 1T1R resistive random access memory (RRAM), as well as SEE in highly scaled nodes with tightly space junctions. Single-event upsets (SEUs), where incident ions change the state of a stored bit in memory (1 to 0, or 0 to 1) were first discovered in RRAMs using backside two photon absorption at Vanderbilt University. SEUs occur when charge generated in the access transistor generate a voltage pulse across the RRAM capable of writing to the cell. For verification of this susceptibility, ions from Lawrence Berkeley National Lab’s 88” cyclotron were used. This allowed for the demonstration of not only SEUs, but also multiple-event upsets (MEUs), where cumulative effects from multiple ions add together to produce a single upset. Tightly spaced silicon junctions were also investigated, showing a strong interaction between adjacent junctions and a higher likelihood of interaction when using alternate SEU testing sources. These results culminated in modeling work that estimated the susceptibility of future RRAM technology nodes, and the results show that they may be more tolerant than many unhardened memory cells.
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