| Type of Document |
Master's Thesis |
| Author |
Mahatme, Nihaar Nilesh
|
| Author's Email Address |
nihaar.n.mahatme@vanderbilt.edu |
| URN |
etd-12062011-113559 |
| Title |
COMPARISON OF COMBINATIONAL AND SEQUENTIAL ERROR RATES AND A LOW OVERHEAD TECHNIQUE FOR SINGLE EVENT TRANSIENT MITIGATION |
| Degree |
Master of Science |
| Department |
Electrical Engineering |
| Advisory Committee |
| Advisor Name |
Title |
| Bharat Bhuva |
Committee Chair |
| Lloyd Massengill |
Committee Member |
|
| Keywords |
- soft errors
- single event effects
- radiation effects
- high speed circuits
- combinational logic circuits
|
| Date of Defense |
2011-11-30 |
| Availability |
unrestricted |
Abstract
Single Event Effects (SEE) in combinational logic circuits, caused due radiation particle strikes are a major concern for modern high-speed devices. The frequency dependence of SEE in state-of-the-art 40 nm circuits is evaluated and the contribution of logic errors to the chip-level Soft Error Rate (SER) is quantified experimentally. A model is developed to help predict the frequency threshold at which logic errors could dominate the chip-level SER. Results suggest that, due to higher transistor density and higher operating frequencies, logic soft errors could exceed the flip-flop error rate for future technologies. A low overhead probabilistic technique to harden logic circuits against radiation induced errors is also developed.
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| Files |
| Filename |
Size |
Approximate Download Time
(Hours:Minutes:Seconds)
|
| 28.8 Modem |
56K Modem |
ISDN (64 Kb) |
ISDN (128 Kb) |
Higher-speed Access |
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NihaarMahatme_MSthesis.pdf |
1.25 Mb |
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