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Title page for ETD etd-09122016-145557


Type of Document Dissertation
Author Ni, Kai
Author's Email Address kai.ni@vanderbilt.edu
URN etd-09122016-145557
Title Single event transient and total ionizing dose effects on III-V MOSFETs for sub-10 nm node CMOS
Degree PhD
Department Electrical Engineering
Advisory Committee
Advisor Name Title
Ronald D. Schrimpf Committee Chair
Daniel M. Fleetwood Committee Member
Michael L. Alles Committee Member
Robert A. Reed Committee Member
Sokrates T. Pantelides Committee Member
Keywords
  • charge collection
  • TCAD
  • parasitic bipolar transistor
  • pulsed laser
  • heavy ion
  • III-V MOSFET
  • single event transient
  • total ionizing dose
Date of Defense 2016-09-08
Availability unrestricted
Abstract
With CMOS scaling continuing to sub-10 nm node, Si is approaching its physical limits. To enable further scaling, alternative channel materials with superior transport properties are proposed to replace Si in the channel. III-V/Ge emerge as promising channel materials for NMOS/PMOS, respectively. The low-power and high-speed nature of these devices represents a strong incentive for their applications in space. However, to apply them in harsh radiation space environment, their radiation responses have to be investigated. In this dissertation, single-event-transient and total-ionizing-dose effects are investigated in III-V MOSFETs with different architectures.

Heavy-ion irradiations, pulsed-laser irradiations, and TCAD simulations are performed to understand their radiation response. Similar to III-V FETs with non-insulating gate, III-V MOSFETs show excess vulnerability to single-event-effects (SEE) compared with their silicon counterparts. Aside from the charge deposited in the sensitive region by the radiation, III-V MOSFETs collect additional charge contributed by an activated parasitic bipolar transistor. Although the activation process varies in detail among different architectures, the key process is the same. Slow holes pile up around the source and channel and reduce the source-to-channel barrier, which causes electrons injecting from the source and collected by the drain. Bipolar amplification factor around 5-10 is measured, posing serious concerns over their space applications.

Unlike the almost perfect Si/SiO2 interface, oxides on III-V materials are usually defective and when electrically stressed, charge trapping will happen. Therefore, combined electrical stress and biased X-ray irradiation measurements are performed. It shows that electrical stress-induced electron trapping compensates radiation-induced hole trapping during positive gate-bias irradiation. Stress-induced hole trapping adds to the effects of radiation-induced hole trapping under negative gate bias. These device level works provide early insights into the radiation effects on III-V MOSFETs and further circuit level analysis.

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