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Title page for ETD etd-04122011-220946


Type of Document Master's Thesis
Author Gaspard, Nelson Joseph III
Author's Email Address nelson.j,gaspard@vanderbilt,edu
URN etd-04122011-220946
Title Impact of well structure on SE response in 90-nm bulk CMOS
Degree Master of Science
Department Electrical Engineering
Advisory Committee
Advisor Name Title
Arthur F. Witulski Committee Member
W. Timothy Holman Committee Member
Keywords
  • well potential modulation
  • well structure
  • single event
  • CMOS
  • anti-punchthrough implants
Date of Defense 2011-03-04
Availability unrestricted
Abstract
As CMOS technology generations advance, the well structure has greater influence on single-event (SE) charge collection processes. Through the use of full 3D TCAD simulations, the effects of well structure are investigated by studying the temporal and spatial characteristics of well potential modulation (WPM). It is shown that the conductivity of the well and the amount of well collected charge are major factors in determining the SE WPM response. WPM is characterized across many layout and technology process parameters to help explain this phenomenon. A set of measurement circuits are proposed that could potentially be used to characterize WPM in any bulk CMOS technology generation. Lastly, the effect on SE mechanisms of anti-puncthrough implants is explored in TCAD simulations. It is shown that some anti-punchthrough implants can affect SE charge collection in pFETs.
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