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Title page for ETD etd-04082016-164141


Type of Document Master's Thesis
Author Shetler, Kevin Joseph
URN etd-04082016-164141
Title Temperature and Total Ionizing Dose Characterization of a Voltage Reference in a 180 nm CMOS Technology
Degree Master of Science
Department Electrical Engineering
Advisory Committee
Advisor Name Title
Lloyd W. Massengill Committee Chair
W. Timothy Holman Committee Member
Keywords
  • TID
  • radiation-hardened-by-design
Date of Defense 2016-03-24
Availability unrestricted
Abstract
A voltage reference is a critical component of analog and mixed signal systems because it provides a global signal used for a variety of system functions. The precision of a voltage reference is critical, so it must be designed such that variation is minimized due to factors such as temperature, power supply variation, and radiation exposure. In this thesis, techniques are presented for minimizing shifts in the output of a typical voltage reference design due to changing temperature and increased radiation exposure. This includes a CMOS variation of a basic bandgap design to implement first order temperature coefficient cancellation and an active thermal regulation feedback loop to minimize effects of temperature, and the use of dynamic-threshold MOS transistors (DTMOSTs), a resistive current mirror, and chopper stabilization to minimize the effects of radiation. A voltage reference circuit was designed and fabricated in IBM CMRF7SF 180nm bulk CMOS technology using these. This circuit was tested at varying temperatures to calibrate variable resistances on-chip, used to calibrate first order temperature coefficient cancellation and the thermal feedback loop, and to demonstrate the effectiveness of the techniques used. Isolated DTMOSTs and the complete reference circuit were tested using X-rays to experimentally verify the radiation tolerance of the individual devices, and the effectiveness of using them along with chopper stabilization as a radiation hardening technique.
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