Type of Document Dissertation Author Amusan, Oluwole Ayodele URN etd-02162009-141344 Title Effects of single-event-induced charge sharing in sub-100 nm bulk CMOS technologies Degree PhD Department Electrical Engineering Advisory Committee
Advisor Name Title Dr. Lloyd W. Massengill Committee Chair Dr. Arthur F. Witulski Committee Member Dr. Bharat L. Bhuva Committee Member Dr. Mark N. Ellingham Committee Member Dr. Michael L. Alles Committee Member Keywords
- nodal spacing
- single event circuit characterization
- soft error cross-section
- Dual Interlocked Cell (DICE) latch
- Radiation hardening
- Space environment
- charge sharing mitigation
- Metal oxide semiconductors Complementary -- Effect of radiation on
Date of Defense 2009-01-23 Availability unrestricted AbstractSub-100 nm technologies are more vulnerable than older technologies to single event effects (SEE) due to Moore's Law scaling trend. The increased SEE vulnerability has been attributed to the decrease in nodal charge for information storage, reduced nodal separation, and increased switching frequency. The effect of the reduced nodal separation is the increased probability of simultaneous charge collection at several nodes from a single ion-strike (called charge sharing).
Charge sharing is a significant SEE issue because it can render circuit-level hardening techniques ineffective. Conventional SEE radiation-hardened by design (RHBD) approaches provide excellent protection against single event upsets (SEU) resulting from charge collection occurs on a single node. However, for sub-100 nm technologies, the probability of multiple node charge collection is significant, thwarting RHBD protection. As CMOS processes continue to scale, there is a continued decrease in nodal pitch, but virtually no change in the charge generation radius of the heavy-ion strike. Hence, charge sharing is a troubling reliability roadblock for advanced technologies.
This dissertation introduces and details the charge sharing effect. It examines – through finite element simulations, focused laser testing, and broadbeam heavy ion experiments – the effects of charge sharing at the 130 nm and 90 nm CMOS technology nodes. Results include quantification of the all-important angle of incidence on device and circuit response. Further, this dissertation examines the effectiveness of several charge sharing mitigation techniques.
The work presented in this dissertation directly impacts the SEE qualification techniques used by the radiation community for sub-100 nm technologies. The mitigation techniques proposed and verified are useful for improving the radiation hardness of advanced technologies, and provide designers with design guidelines applicable to space-deployed applications.
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